Winter Term 2017/18
Introduction and handout of seminar topics:
Thursday Oct. 3, 14.15 – 16.00, 3W03, Architecture building
Participation is mandatory . Only 25 students can be accepted which must regisert via Online-Anmeldesystem des Instituts . If a registered student does not show up at the introduction then the student loses his space in the seminar which will be given to a student on the waiting list for this seminar.
Foils for the introduction to the seminar.
Dr. T. Fahringer, Email: Thomas.Fahringer@uibk.ac.at
office hours: each Wednesday from 1 – 2 pm, ICT building, 2nd floor, room 3M06
Schedule and location of the seminar:
To be announced on Oct. 3 in the introduction of this seminar.
Master and Phd students of computer science
The number of cores--or number-crunching units--in microprocessors is doubling with each generation, providing enormous computing potential for desktops, laptops, and, eventually, handheld gadgets. Current computers with 8 and more cores, for example, are particularly useful for such computation-hungry applications as video processing and gaming. However, the new multicore machines are basically small-scale supercomputers, and in order to take full advantage of the computing power they offer, software must be written with an arbitrary number of cores in mind--a time-consuming and difficult task known as parallel programming. And many experts believe that unless parallel programming can be made easier, computing progress will come to a grinding halt.
All major microprocessor developers have switched to build mostly multicore chips which puts small scale supercomputers on every device ranging from regular PCs, to cellular phones, PDAs, consoles, servers and even any kind of embedded systems found. The problem however is that hardly any computer scientists or programmers have expertise in programming mainstream multicore parallel computers. This will create enormous problems as programming for multicore computers is very different than programming old-fashioned single processor systems.
Software developers can no longer rely on increasing clock speeds alone to speed up single-threaded applications; instead, to gain a competitive advantage, developers must learn how to properly design their applications to run in a threaded environment. Multi-core architectures have a single processor package that contains two or more processor "execution cores," or computational engines, and deliver—with appropriate software—fully parallel execution of multiple software threads. Hyper-Threading Technology enables additional threads to operate on each core.
In this seminar we will cover introductory topics in the field of multicore parallel computing:
- programming paradigms and languages
- application development
- tools (performance, energy, availability, reliability measurement and analysis tools, debuggers, correctness tools, etc.)
for multicore parallel computers.
The list of topics and time schedule can be found here.
Acquire the ability to study and present new research material. In depth understanding of a selected seminar topic.
A group of up to 2 students selects a seminar topic for which a seminar document (approximately 15 pages per student) and a Powerpoint/Latex presentation (30 Min. + 5 min. discussion per person) has to be prepared. Both seminar document and presentation slides must be sent via email to email@example.com at least 1 day before the presentation. The same material must be printed out and handed over to the instructor at the day of the presentation.
Both seminar document, presentation and slides have an impact on the grade. All participants must be present at all seminars. All documents, slides and presentations must be done in English.
Master and Phd study.